 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| BUK95/96/9E04-40A TrenchMOSTM logic level FET Rev. 01 -- 24 October 2001 Product data 1. Description N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOSTM technology, featuring very low on-state resistance. Product availability: BUK9504-40A in SOT78 (TO-220AB); BUK9604-40A in SOT404 (D 2-PAK); BUK9E04-40A in SOT226 (I2-PAK). 2. Features s s s s TrenchMOSTM technology Q101 compliant 175 C rated Logic level compatible. 3. Applications s Automotive and general purpose power switching: x 12 V loads x Motors, lamps and solenoids. 4. Pinning information Table 1: Pin 1 2 3 mb Pinning - SOT78, SOT404, SOT226 simplified outline and symbol Description gate (g) drain (d) source (s) mounting base, connected to drain (d) 2 MBB076 Simplified outline [1] mb mb mb Symbol d g s 1 MBK106 3 MBK116 123 MBK112 123 SOT78 (TO-220AB) [1] SOT404 (D2-PAK) SOT226 (I2-PAK) It is not possible to make connection to pin 2 of the SOT404 package. Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 5. Quick reference data Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tmb = 25 C; VGS = 5 V Tmb = 25 C Tj = 25 C; VGS = 5 V; ID = 25 A Tj = 25 C; VGS = 4.3 V; ID = 25 A Tj = 25 C; VGS = 10 V; ID = 25 A [1] Symbol Parameter drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Typ 3.5 3.7 2.9 Max 40 198 300 175 4.4 5.9 4 Unit V A W C m m m 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 C; VGS = 5 V; Figure 2 and 3 Tmb = 100 C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM WDSS peak drain current total power dissipation storage temperature operating junction temperature reverse drain current (DC) pulsed reverse drain current non-repetitive avalanche energy Tmb = 25 C Tmb = 25 C; pulsed; tp 10 s unclamped inductive load; ID = 75 A; VDS 40 V; VGS = 5 V; RGS = 50 ; starting Tmb = 25 C [1] [2] [1] [2] [2] Conditions RGS = 20 k Min -55 -55 - Max 40 40 15 198 75 75 794 300 +175 +175 198 75 794 1.6 Unit V V V A A A A W C C A A A J Tmb = 25 C; pulsed; tp 10 s; Figure 3 Tmb = 25 C; Figure 1 Source-drain diode Avalanche ruggedness [1] [2] Current is limited by power dissipation chip rating Continuous current is limited by package 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 2 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 120 Pder (%) 100 03na19 200 ID (A) 150 03ne93 80 60 100 40 50 Capped at 75 A due to package 20 0 0 25 50 75 100 125 150 175 200 Tmb (C) 0 25 50 75 100 125 150 175 200 Tmb (C) P tot P der = ---------------------- x 100% P tot ( 25 C ) VGS 4.5 V ID I der = ------------------- x 100% I D ( 25 C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Continuous drain current as a function of mounting base temperature. 103 ID (A) RDSon = VDS / ID tp = 10 s 03ne68 102 Capped at 75 A due to package 100 s 1 ms DC 10 10 ms 100 ms 1 1 10 VDS (V) 102 Tmb = 25 C; IDM single pulse. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 3 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 7. Thermal characteristics Table 4: Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions vertical in still air; SOT78 and SOT226 packages mounted on printed circuit board; minimum footprint; SOT404 package Rth(j-mb) thermal resistance from junction to mounting base Figure 4 Value 60 50 Unit K/W K/W 0.5 K/W 7.1 Transient thermal impedance 1 Zth(j-mb) (K/W) = 0.5 10-1 03ne69 0.2 0.1 0.05 0.02 P 10-2 = tp T Single Shot tp t T 10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration. 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 4 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 8. Characteristics Table 5: Characteristics Tj = 25 C unless otherwise specified Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 C Tj = 175 C Tj = -55 C IDSS drain-source leakage current VDS = 40 V; VGS = 0 V Tj = 25 C Tj = 175 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 10 V; VDS = 0 V VGS = 5 V; ID = 25 A; Figure 7 and 8 Tj = 25 C Tj = 175 C VGS = 4.3 V; ID = 25 A VGS = 10 V; ID = 25 A Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf Ld total gate charge gate-to-source charge gate-to-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance from drain lead 6 mm from package to centre of die from contact screw on mounting base to centre of die SOT78 from upper edge of drain mounting base to centre of die SOT404 / SOT226 Ls internal source inductance from source lead to source bond pad VDD = 30 V; RL = 1.2 ; VGS = 5 V; RG = 10 VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12 VGS = 5 V; VDD = 32 V; ID = 25 A; Figure 14 128 13 56 6200 1040 680 62 309 365 306 4.5 3.5 8260 1250 940 nC nC nC pF pF pF ns ns ns ns nH nH 3.5 3.7 2.9 4.4 8.3 5.9 4 m m m m 0.05 2 10 500 100 A A nA 1 0.5 1.5 2 2.3 V V V 40 36 V V Min Typ Max Unit Static characteristics - 2.5 - nH - 7.5 - nH 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 5 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET Table 5: Characteristics...continued Tj = 25 C unless otherwise specified Symbol VSD trr Qr Parameter source-drain (diode forward) voltage reverse recovery time recovered charge Conditions IS = 40 A; VGS = 0 V; Figure 15 IS = 20 A; dIS/dt = -100 A/s VGS = -10 V; VDS = 30 V Min Typ 0.85 260 531 Max 1.2 Unit V ns nC Source-drain diode ID (A) 350 300 250 200 150 100 50 400 VGS = 5 V 8 10 76 03nd95 5 RDSon (m) 03nd94 4 4 3 3 2.2 0 0 2 4 6 8 10 VDS (V) 2 3 6 9 12 VGS (V) 15 Tj = 25 C; tp = 300 s Tj = 25 C; ID = 25 A Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values. 10 RDSon (m) 8 VGS = 3 V 3.2 3.4 3.6 3.8 4 03nd96 03aa27 2 a 1.6 6 5 4 10 1.2 0.8 2 0.4 0 0 100 200 300 ID (A) 400 0 -60 0 60 120 Tj ( C) o 180 Tj = 25 C R DSon a = ---------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Fig 7. Drain-source on-state resistance as a function of drain current; typical values. 9397 750 08649 Product data Rev. 01 -- 24 October 2001 6 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 03aa33 2.5 VGS(th) (V) 2 max 10-1 ID (A) 10-2 03aa36 typ 1.5 10-3 min typ max 1 min 10-4 0.5 10-5 0 -60 0 60 120 Tj ( C) o 10-6 180 0 0.5 1 1.5 2 2.5 3 VGS (V) ID = 1 mA; VDS = VGS Tj = 25 C; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. 100 gfs (S) 80 03nd92 Fig 10. Sub-threshold drain current as a function of gate-source voltage. 03nd97 14000 C (pF) 12000 10000 60 8000 6000 4000 40 Ciss 20 2000 Coss Crss 0 0 0 20 40 60 ID (A) 80 10-2 10-1 1 10 102 VDS (V) Tj = 25 C; VDS = 25 V VGS = 0 V; f = 1 MHz Fig 11. Forward transconductance as a function of drain current; typical values. Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 7 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 100 ID (A) 80 03nd93 5 VGS (V) 4 03nd91 60 3 VDD = 14 V VDD = 32 V 40 Tj = 175 C 20 Tj = 25 C 2 1 0 0 1 2 3 VGS (V) 4 0 0 20 40 60 80 100 120 140 QG (nC) VDS = 25 V Tj = 25 C; ID = 25 A Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Fig 14. Gate-source voltage as a function of turn-on gate charge; typical values. 100 IS (A) 80 03nd90 60 40 Tj = 175 C 20 Tj = 25 C 0 0.0 0.2 0.4 0.6 0.8 1.0 VSD (V) VGS = 0 V Fig 15. Reverse diode current as a function of reverse diode voltage; typical values. 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 8 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 9. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 E p A A1 q D1 mounting base D L1(1) L2 Q L b1 1 2 3 b c e e 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 4.5 4.1 A1 1.39 1.27 b 0.9 0.7 b1 1.3 1.0 c 0.7 0.4 D 15.8 15.2 D1 6.4 5.9 E 10.3 9.7 e 2.54 L 15.0 13.5 L1(1) 3.30 2.79 L2 max. 3.0 p 3.8 3.6 q 3.0 2.7 Q 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC 3-lead TO-220AB EIAJ SC-46 EUROPEAN PROJECTION ISSUE DATE 00-09-07 01-02-16 Fig 16. SOT78 (TO-220AB). 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 9 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped) SOT404 A E A1 mounting base D1 D HD 2 Lp 1 3 b c Q e e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 4.50 4.10 A1 1.40 1.27 b 0.85 0.60 c 0.64 0.46 D max. 11 D1 1.60 1.20 E 10.30 9.70 e 2.54 Lp 2.90 2.10 HD 15.80 14.80 Q 2.60 2.20 OUTLINE VERSION SOT404 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 99-06-25 01-02-12 Fig 17. SOT404 (D2-PAK). 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 10 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET Plastic single-ended package; low-profile 3 lead TO-220AB SOT226 A D1 E A1 mounting base D L2 b1 L1 Q L 1 2 3 b c e e 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 4.5 4.1 A1 1.40 1.27 b 0.9 0.7 b1 1.3 1.0 c 0.7 0.4 D 9.65 8.65 D1 1.5 1.1 E 10.3 9.7 e 2.54 L 15.0 13.5 L1 3.30 2.79 L2 max 3.0 (1) Q 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT226 REFERENCES IEC JEDEC low-profile 3-lead TO-220AB EIAJ EUROPEAN PROJECTION ISSUE DATE 99-05-27 99-09-13 Fig 18. SOT226 (I2-PAK). 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 11 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 10. Soldering handbook, full pagewidth 10.85 10.60 10.50 1.50 7.50 7.40 1.70 2.25 2.15 8.15 8.35 8.275 1.50 4.60 0.30 4.85 5.40 8.075 7.95 3.00 0.20 solder lands solder resist occupied area solder paste 5.08 1.20 1.30 1.55 MSD057 Dimensions in mm. Fig 19. Reflow soldering footprint for SOT404. 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 12 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 11. Revision history Table 6: Rev Date 01 20011024 Revision history CPCN Description Product Specification; initial version 9397 750 08649 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 13 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET 12. Data sheet status Data sheet status[1] Objective data Preliminary data Product status[2] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Product data Production [1] [2] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 13. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 14. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 15. Trademarks TrenchMOS -- is a trademark of Koninklijke Philips Electronics N.V. Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. 9397 750 08649 Fax: +31 40 27 24825 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 24 October 2001 14 of 15 Philips Semiconductors BUK95/96/9E04-40A TrenchMOSTM logic level FET Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 14 15 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 (c) Koninklijke Philips Electronics N.V. 2001. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 24 October 2001 Document order number: 9397 750 08649 |
Price & Availability of BUK9504-40A
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |